英语超级棒的请进那位大狭帮我翻译一下这段文字,万分感谢Introduction: The generic 8031 ar

英语超级棒的请进
那位大狭帮我翻译一下这段文字,万分感谢
Introduction:
The generic 8031 architecture sports a Harvard architecture, which contains two separate buses for both program and data. So, it has two distinctive memory spaces of 64K X 8 size for both program and data. It is based on an 8 bit central processing unit with an 8 bit Accumulator and another 8 bit B register as main processing blocks. Other portions of the architecture include few 8 bit and 16 bit registers and 8 bit memory locations. Each 8031 device has some amount of data RAM built in the device for internal processing. This area is used for stack operations and temporary storage of data. This base architecture is supported with onchip peripheral functions like I/O ports, timers/counters, versatile serial communication port. So it is clear that this 8031 architecture was designed to cater many real time embedded needs.
The following list gives the features of the 8031 architecture:
#Optimized 8 bit CPU for control applications.
#Extensive Boolean processing capabilities.
#64K Program Memory address space.
#64K Data Memory address space.
#128 bytes of onchip Data Memory.
#32 Bi-directional and individually addressable I/O lines.
#Two 16 bit timer/counters.
#Full Duplex UART.
#6-source / 5-vector interrupt structure with priority levels.
#Onchip clock oscillator.
Now you may be wondering about the non mentioning of memory space meant for the program storage, the most important part of any embedded controller. Originally this 8031 architecture was introduced with onchip, ‘one time programmable’ version of Program Memory of size 4K X 8. Intel delivered all these microcontrollers (8051) with user’s program fused inside the device. The memory portion was mapped at the lower end of the Program Memory area. But, after getting devices, customers couldn’t change any thing in their program code, which was already made available inside during device fabrication.
不要在线翻译出来的结果，谢谢

介绍:普通8031 建筑学炫耀哈佛建筑学,包含二辆不同公共汽车为节目和数据.如此,它有二特别存储量64K x 8 大小为节目和数据.它根据一个8 位中央处理单元以一台8 位累加器和另外8 位B 记数器作为主要处理块.其它建筑学的部份包括少量8 位和16 台位记数器和8 个位存储单元.各8031 设备有某一相当数量数据RAM 被建立在设备为内部处理.这个区域被使用为堆操作和数据临时储藏.这基本的建筑学支持以onchip 周边作用象I/O 口岸,timers/counters,多才多艺的串行通信口岸.如此它是确切,这8031 建筑学被设计承办宴席许多实时嵌入需要.以下名单给8031 的特点建筑学:# 优选了8 位CPU 为控制应用.# 广泛的布尔工序特色.#64K 节目存储地址空间.#64K 数据存储地址空间.#128 onchip 数据记忆字节.#32 双向和单独地可寻址的I/O 线.# 二16 位timer/counters .# 全双工UART .#6 来源/5 传染媒介中断结构以优先级别.# Onchip 时钟摆动器.现在您也许对非提及存储量感到奇怪意味为节目存贮,任一个嵌入式控制器的最重要的部份.这8031 建筑学最初被介绍了以onchip,` 节目记忆的一个次可编程序的' 版本大小4K x 8 .英特尔交付了所有这些微型控制器(8051) 以用户程序被熔化在设备里面.记忆部份被映射了在节目存储器的末端.但,在得到设备以后,顾客不能改变任何事在他们的节目代码,已经被做可利用的里面在设备制造期间.